Forum Discussion
Nicole04
Occasional Contributor
Occasional ContributorAgilex 5 E-Series FPGA Triple Speed Ethernet SGMII with PHY Management
Good day, I would like to use the Triple Speed Ethernet IP Core for 16 10M/100M/1G Ethernet ports on the Agilex 5. I am unable to set up the IP core to use the transceiver and have a PHY management...
paveetirrasrie_Altera
Frequent Contributor
Frequent ContributorHi,
I'm unable to give you a exact release date but you may expect it in coming release.
rx_clkena - Receive clock enabler for SGMII 10M/100M operating speeds.
tx_clkena - Transmit clock enabler for SGMII 10M/100M operating speeds.
Regards,
Pavee
