Forum Discussion
Lance313
New Contributor
New ContributorAgilex 100G E-Tile MAC interface tx_ready is continuously flipping after linkup.
The following is similation wave. The tx_ready signal is is continuously flipping after linkup, whether user send packet or not. We also observe this phenomenon by testing on fpga board. 1. Is th...
ZiYing_Intel
Frequent Contributor
Frequent ContributorHi,
You may use i_tx_error for testing, to generate errored packets. To invalidate an errored frame, end it with i_tx_endofpacket and assert i_tx_error. If the frame is good, deassert i_tx_error. For further information, you may refer to link below, Figure 40, pg 128, https://www.intel.com/content/www/us/en/docs/programmable/683468/23-2/tx-mac-interface-to-user-logic.html
Best regards,
zying
Lance313New Contributor
New ContributorHi，
Thanks for your reply. But my question is about o_tx_ready. What is the purpose of generating errored packets?
