Occasional Contributor
Occasional ContributorI see only the Data[15...8] and Data[7...0] in the "dual purpose pins" tab :
I don't see the Flash pins such as Dclk, ncs AS Data[3...0]
Occasional ContributorAh yes you're right.
I assumed that, based on the message at the top of the window, Quartus was automatically refering to the configuration pins for the selected configuration mode.
So either the AS pins are available by default as user I/Os in User mode, or the setting for this behaviour is elsewhere...
However I do not know of other settings about this. In a design, I use the AS configuration pins as user I/Os to access a QSPI flash (just as you do) and it works. Only thing is that I program the FPGA with JTAG (.sof file) and not actual active serial, despite the Quartus settings.
Is it possible for you to try?
Occasional ContributorQuick note: I stumbled on a "Enable input tri-state on active configuration pins in user mode" option in "Device&pins options"' configuration page. It is disabled by default and I have never changed it.
Maybe you can use this to prevent user access to AS pins?
By the way I use Arria 10 SOC (I do not know if it is relevant here)
