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RamaMohan's avatar
RamaMohan
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

A10 PCIe SRIOV IP not sending completion to Root Port

We are trying to run a simulation with A10 PCIe+SRIOV IP, where Root Port is trying to access a registers behind BAR0 of the IP. There is a write followed by 3 reads from Root Port and the completion...
RamaMohan's avatar
RamaMohan
Icon for Occasional Contributor rankOccasional Contributor
7 years ago
Hi SK, I may not be able to share the project with you as this have third party IPs and confidential code. I can share the PCIe IP configuration parameters (.ip) that we are using. Thanks, RamaMohan