Forum Discussion

RamaMohan's avatar
RamaMohan
Icon for Occasional Contributor rankOccasional Contributor
7 years ago

A10 PCIe SRIOV IP not sending completion to Root Port

We are trying to run a simulation with A10 PCIe+SRIOV IP, where Root Port is trying to access a registers behind BAR0 of the IP. There is a write followed by 3 reads from Root Port and the completion...
RamaMohan's avatar
RamaMohan
Icon for Occasional Contributor rankOccasional Contributor
7 years ago
Hi SK, Here’s the list of Read req/rsp we tried, from IP logfile altpcie_monitor_a10_dlhip_tlp_file _log.log. Only the completion of last request(marked Bold) is not sent out by the IP. So far we are observing this behavior only with address 0. | 332 RX | MWr | 0004 | 60000001_0000000F_00000020_0000E014 | | 332 RX | MRd (00) | 0004 | 20000001_0000000F_00000020_0000E014 | | 332 TX | CplD (00) | 0004 | 4A000001_01000004_00000014 | | 333 RX | MRd (00) | 0004 | 20000001_0000000F_00000020_0000E01C | | 333 TX | CplD (00) | 0004 | 4A000001_01000004_0000001C | | 334 RX | MRd (00) | 0004 | 20000001_0000000F_00000020_0000E01C | | 334 TX | CplD (00) | 0004 | 4A000001_01000004_0000001C | | 335 RX | MRd (00) | 0004 | 20000001_0000000F_00000020_0000E01C | | 335 TX | CplD (00) | 0004 | 4A000001_01000004_0000001C | | 336 RX | MRd (00) | 0004 | 20000001_0000000F_00000020_0000E01C | | 336 TX | CplD (00) | 0004 | 4A000001_01000004_0000001C | *| 337 RX | MRd (00) | 0004 | 20000001_0000000F_00000020_0000E000 |* Thanks, RamaMohan