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JET60200's avatar
JET60200
Icon for Contributor rankContributor
4 years ago

[A10 PCIe AVMM] How to implement the customer MSI to Host, while Disable READ/WRITE DMA Done MSI

HEllo Expert, We are using "Arria10 PCIe AVMM IP" to transfer data between FPGA and the Host, and it works as expect. Now we need to implement a customer MSI , so we enable "Export MSI/MSI...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


The MSI interrupt is generated from the internal Descriptor Controller and then send to TXS port. There seem like no option to disable it. However, you may create a custom component before the TXS port to detect and drop the MSI message that comes from the descriptor controller if this is NOT necessary.


Regards -SK