Forum Discussion
ZWang142
New Contributor
6 years ago1/2.5/5/10G Multi-rate Ethernet PHY simulation cannot reach rx_block_lock
The simulation of the example design, provided by the "Low Latency Ethernet 10G MAC" IP, is running fine. However, when simulating my design, the PHY can not acheive rx_block_lock. The waveform sho...
Deshi_Intel
Regular Contributor
6 years agoHI,
Thanks. I copied over the newly generated mif file to rtl/reconfig folder. Now, I can see that rx_block_lock asserted high.
Hopefully you can find out what's wrong with your design as well. All the best to your project development.
Regards,
dlim