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As far as I understand the -max and -min values, I believe they can equate to setup and hold times (effectively generating the stable time window for your signals)
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Thanks for the response - and yes, that's, broadly, my understanding too, but I'm a bit fuzzy on why for output delays it's suggested to use the negative of the external device's hold time?
I'm currently fairly sure the problem's related to the generated clock, because I've just had a build that worked perfectly despite failing IO timing by 1.5ns on several SDRAM outputs. I've added "-offset 1.5" to the create_generated_clock line, and set the input and output constraints to the bare datasheet values, with no extra routing estimates. Since then every build has worked, but I have no idea *why* that 1.5ns offset is needed, and how stable it'll be as the design progresses.
Any ideas?
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