Forum Discussion
Thanks Xiaoyan,
I tried creating a design with the Generic Serial Flash and an JTAG to Avalon Bridge, and was able to communicate with the flash memory registers using System Console, so this may be a potential solution. Unfortunately this method doesn't seem to work using the default Serial Flash Loader image that Quartus Programmer uses to program .jic files into flash; if it did, that would be perfect.
Up until now we have used the ASMI Parallel IP core for remote firmware update in our design, because it allowed us to implement it without using an Avalon memory-mapped slave interface. The Generic Serial Flash IP forces us to use the Avalon interface, which would require a major change to the register architecture that we currently use. Do you have an idea of how much longer Intel will continue to support the ASMI Parallel IP core?
Also, does the Generic Serial Flash IP core support multiple masters on the Avalon bus? If we did use this IP core we would like to be able to control it both from JTAG and another source to support remote firmware update.
Thanks,
Paul