Will Cyclone w/ Quartus do this?

Once you have your data flow in your mind, you could as parrdo already mentioned, use the altera megafunctions to implement the needed data processing and wire the stuff up on schematics top level or use vhdl or verilog hdl or altera hdl.

so you need a modul that reads out an ADC at a constant rate, feed the value into the next modul that calculates the difference between the actual and the last ADC, and so on ...

you can to this with purely fsm to get an acurate time constant measument or use a smal cpu like nios if you need to process your data a bit more and send them via any kind of interface. but of course you could also do this without any cpu.

an fpga can do so many things at the same time, yes at the same clock cycle.

if you want, you can get an FFT of your input samples to see what frequency causes your voltage changes :-) The fft won't disturb your sampling rate of 1 MSPS.