Forum Discussion
BoonT_Intel
Frequent Contributor
5 years agoHi Sir,
After playing around the setting on by one, I found the culprit is "Address width of accessible PCIe memory space".
The generation errors will occur when we set the value to 63 and 64. It will generate the example design successfully when we set the value to 62 and below.
As temporary work around, can you generate the design using "Address width of accessible PCIe memory space" set to 62 or below?
- BQi5 years ago
Occasional Contributor
Which tab has The parameter “Address width of accessible PCIe memory space”?