Contributor
Super ContributorYou are correct. In most cases, you don't need to manually add bridges to a design like this. Clock crossing logic is added automatically to the interconnect when the system is generated. However, you may want to add a bridge manually like this for more control over how the clock crossing is implemented. As for the pipeline bridge, that is used to adjust the topology of a system (for example, aggregate multiple exported interfaces into one) or add pipeline stages to improve performance.
So the short answer is that these bridges are optional.
#iwork4intel
ContributorThanks @sstrell for detailed clarification.
Regarding of "Quartus Automatic Adding the internal bridge" vs "Customer defines the defined bridge", how could we compare and evaluate their performance difference, to decide which one to be used ? Do you have any idea ?
Thanks a lot
Frequent ContributorHi Sir,
From performance perspective, usually without the bridge is the best because the latency is decrease. The bridge is add for some other purpose like both master-slave clock use different clock domain, multiple master to single slave or vice versa. You may refer to the description of the bridge as explain in this document, all bridge added is for some purpose.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/edh_ed51007.pdf
