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shubham963's avatar
shubham963
Icon for New Contributor rankNew Contributor
3 years ago

why the output wave is showing blue line in questa-intel FPGA

hi , i am trying to generated a pulse for my converter. In Quartus everything is fine and i have seen the output waveform in digital oscilloscope. I want to see the waveform in Questa-Intel FPGA bu...
VenT_Altera's avatar
VenT_Altera
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi,


To perform Questa simulation, you need to have a test bench. You may refer to this https://community.intel.com/t5/Intel-Quartus-Prime-Software/Creating-test-bench-code-on-Quartus-prime/m-p/586458 on creating a test bench.


Next, for VWF simulation,

  1. The device family used needs to change to the supported family devices (Arria II GX, Arria II GZ, Cyclone IV E, Cyclone IV GX, MAX II, MAX V, Stratix IV), either one will do.
  2. Compile the design.
  3. Create a new University Program VWF.
  4. Set the nodes and run timing simulation.

Then, you should be able to get the output result. By setting the first_project.bdf to top-level entity, from your design, this is the VWF waveform generated I obtained (ss_VWF_waveform).


Thanks.

Best Regards,

Ven Ting