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gyuunyuu's avatar
gyuunyuu
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5 years ago

Why must the VCCA be powered in Cyclone 10 LP even if PLLs are not being used?

The device documentation related to the Cyclone 10 LP FPGA states that "you must power up VCCA even if the PLL is not used". We were comparing the power dissipation of a Microsemi IGLOO2 FPGA with t...
SreekumarR_G_Intel's avatar
SreekumarR_G_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Internal to the Cyclone 10 LP devcice designed such as way " POR circuit continues to monitor the VCCINT and VCCA pins so that a brown-out condition during user mode is detected. If the VCCINT or VCCA voltage sags below the POR trip point during user mode, the POR circuit resets the device ".

i am sorry i have no idea why it is designed such as way . Instead can I know how much power disspiation requirement for your project ?

Thanks,

Sree

gyuunyuu's avatar
gyuunyuu
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5 years ago

See the main issue is that there is a lot of current draw on VCCA (several mA) inspite of no PLL being used in the design. This is the main problem.