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In the second process you write:
out_register <= out_register
out_register behaves like a latch, so you need a latch enable. May be Quartus takes "enable" as a clock because the register refresh it's output when enables goes high. I think Quartus inferred a latch.
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I might just remove it since it's useless (this is legacy code) and test it.
I forgot to say what i get in timequest.
It says i have 1 unconstrained clock and that
Node: shuffler:shuffler_0|enable was determined to be a clock but was found without an associated clock assignment.
To solve it i used a false path to it but i don't think it's the right thing.
Honored Contributor
