Why do I get the following relsult in my FIR filter output

Hi,

Please refer to below explanation.

For LINT-28 (warning) In design.

DESCRIPTION

This warning alerts you that a port in a design is not connected to any nets. This usually indicates

that a design has not been correctly specified. However, there are some situations where, as a

designer, you choose to specify a port on a design for compatibility reasons, even though the port

is not internal to design use. The Synopsys tools leave unconnected ports alone, with one

exception; that is, you specified that a given input port is opposite or equal to another input port in

a design.

WHAT NEXT

Make sure that you want the named port to exist in the given design, even though it has no

nets connected. Remove the port from your design if you choose.

For LINT-33 (warning) In design.

DESCRIPTION

check design issues this warning when it finds an instance of a hierarchical design (for

example, a sub-module) that has more than one input connected to the same net. This

warning is issued to verify that these are desired connections on the submodule. Be aware that

compile can remove logic in a design that is redundant. So, compile can produce designs that

display this warning if it determines that multiple inputs on a submodule are driven by the same

logical signal.

WHAT NEXT

Verify that you want the given submodule inputs connected to the same logical signal. If you have

run compile, you might want to use verify to verify the optimized design with your original. Or, use

the -verify option to compile whenever feasible.

Thank you

Kshitij Goel