Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorWhat's LVDS Setup and Hold time?
Hi, So i've read this Setup and Hold time specification from a datasheet for an ADC. I am not sure what's the meaning of it, but I am assuming that the setup and hold time for the FPGA must be ...
Altera_ForumHonored Contributor
Honored ContributorI guess this will be help.
http://en.wikipedia.org/wiki/flip-flop_(electronics)
