What should happen when I assert nPOR on my Cyclone V?
I want to reboot my HPS system in my Cyclone V. I can hold nPOR (power on reset) low when I power up and when I release it, my HPS boots just fine. But later, when I bring nPOR low, then high, my processor is simply hung and it did not reboot, as I would have expected.
The same thing happens when I write the cold reset bit in the reset manager or when the FPGA asserts it's version of the cold reset.
I would expect the cold reset to actually cold reset which, to me, means the HPS should boot from the BOOT ROM all the way though as it would as power up. But it does not.
Am I doing something wrong? What is the expected behavior when the power on reset (cold reset) is asserted, then deasserted?
Again, your answer is senseless. Of course I can boot again when I power cycle. What I cannot do is cold restart.
It turns out this is a documented problem: https://rocketboards.org/foswiki/Documentation/SocBoardQspiBoot
It would seem that Intel support would be aware of this and have not taken me more than a week of my own time to find. And, no, it has nothing to do with my binary. I hope my wasted time on this issue helps others find the needed solution.