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Altera_Forum
Honored Contributor
Honored ContributorWhat is the best HDL language for the future: VHDL, Verilog or System Verilog?
Hello, which language is the best to learn for the future of FPGA design Verilog, VHDL or System Verilog? Or, is there something else that will replace the current languages? thanks, joe
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Have you ever heard of System VHDL, no? --- Quote End --- Well, no, because VHDL already had a lot of the features SV brought to verilog. But I agree VHDL will become more sidelined. It will never go away completly, due to the large amount of legacy VHDL lying around, that will undoubtedly get re-used. Quartus still supports AHDL after all (and if you ever check the db directory, it's full of AHDL). But its not really the language thats important, its the technology. Theres a big push for C to gates technology now (again). And its actually much better than it was the last time around.
