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Altera_Forum's avatar
Altera_Forum
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12 years ago

What is the best HDL language for the future: VHDL, Verilog or System Verilog?

Hello, which language is the best to learn for the future of FPGA design Verilog, VHDL or System Verilog? Or, is there something else that will replace the current languages? thanks, joe
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

IMO, the best language to learn is the one that's most in use in the location you intend to live. For me this is Verilog. For my buddies on the east coast, it's often VHDL. SystemVerilog is to Verilog as C++ is to C -> Both will always be in use as the projects determines.

That being said, Verilog is dead easy to learn...