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Altera_Forum's avatar
Altera_Forum
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10 years ago

What is the Altera SPI name convention?

Maybe it is a beginner question:

If I configure in QSYS a SPI-Bus I export the external line with the name "spi_1_external". Now I would like to connect a dac to this spi which has following lines:

http://www.alteraforum.com/forum/attachment.php?attachmentid=10692&stc=1

The question is, what name convention Altera is using for the port mapping in my vhd-file? Is it allways something like "spi_1_external_miso" etc... or can I also use "spi_1_external_rstn" for example?

Maybe there is a link to an AN to see what names for the SPI are used.

Thanks!

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    In Qsys, if you've named your SPI peripheral 'spi_1_external' then it will generate a set of names as follows:

    SPI_CLK_from_the_spi_1_external

    SPI_CS_n_from_the_spi_1_external

    SPI_IN_to_the_spi_1_external

    SPI_OUT_from_the_spi_1_external

    These can be connected up to 'SCLK', 'SYNC', 'SDI' & 'SDO' respectively on the AD5681R. You will have to deal with 'LDAC' separately. However, you do have the option to tie this LOW in which case the DAC will update whenever new data is written.

    If your Qsys modue is also your top level design then you will be stuck with these names. However, if you instantiate your Qsys module in a higher level module (or simply a wrapper) you're free to connect any signal name you like to it. So, you can rename it if that suits you.

    Cheers,

    Alex
  • Altera_Forum's avatar
    Altera_Forum
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    Hello Alex

    thanks for the reply. So when I deal with "LDAC" separately (PIO), where do I set the individual value for it? I think I can set the reset value in QSYS but how can I access LDAC directly from NIOS?

    Thanks
  • Altera_Forum's avatar
    Altera_Forum
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    You can use the built in nios 'IOWR' macro. E.g. IOWR(PIO_BASE, address, data).

    Cheers,

    Alex