Forum Discussion
Altera_Forum
Honored Contributor
14 years agoWhere's that from? That's the technical answer, i.e. your data has to be at the register before the clock by the amount of the uTsu. That's just looking at the register. If you step back and look at data path and clock path, then you're looking at the whole picture, and that is what the Data Arrival Path and Data Required Path cover. (Those terms should be in the handbook or TQ documentation, but running "report_timing -setup ..." on any path in your design and looking at the Data Path tab should help understand Data Arrival and Data Required.)