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Altera_Forum
Honored Contributor
14 years agoWhat do mean by " So when we do a setup check on this path, the Data Arrival Path must get to the FPGA before the data required path's micro setup time(utsu)"
Thanks, AAWhat do mean by " So when we do a setup check on this path, the Data Arrival Path must get to the FPGA before the data required path's micro setup time(utsu)"
Thanks, AA