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Altera_Forum's avatar
Altera_Forum
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15 years ago

what can I do to delay the source

I'm using the megafunction ALTDDIO as a receiver which requires the input data to be centered aligned to the rising and falling source clock. Unfortunely I have learned the source and data are going to be coming in edge aligned. I've been trying to find a way to delay the input clock by 90 degrees. I have looked into using the PLL, but because of the wide range of source clock (25MHz to 165MHz), the PLL won't be able to lock onto it so this is not an option.

Is there a way to delay the clock or data so that they meet the ALTDDIO requirement?

Your comment is much appreciated.

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Hi FvM,

    Sorry but I don't see it annoying but the perspective has been widened more than just PLL solution.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    FvM, I was trying to present the problem from a different point of view so that people can understand it better instead of just looking at the PLL.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Yes, that's O.K., but you see, that all suggestions are returning to the same points. The contributors don't see from the present thread, that you have already thought about PLLs.