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Altera_Forum's avatar
Altera_Forum
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16 years ago

Waveform simulation no results！

VHDL code is not wrong ,but when i create do not get the results of simulation waveform file.somewhere i malke a mistake !! can you help me ? library ieee; use ieee.std_logic_1164.all; entit...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

no , i thinlk it's output port .need assign value ?o i try it again . than you !