Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Warning (10236): Verilog HDL Implicit Net warning at cc_r2a_refdes_sdhc_cntrl.v(40):

before i begin let me explain that in the last post i made i had a problem deciding whether to assign a sdram pin known as SDRAM_CKE ... in the tutorial i am using in the top level entity file it is ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Have you got an input or output declared on your top level module Verilog file with the name SDRAM_CKE?