Honored ContributorHi
I haven't fully understood the concept of the VREF pins. I know this is the threshold voltage at which a voltage referenced IO standard decides between a low or high. But isn't this just always half the voltage of the IO standard, so for a 3.0 V standard 1.5 V, for a 1.8 V standard 0.9 V etc... Are there applications where it makes sense not to set it to half the voltage of the IO standard? Best regards, Adam
Honored ContributorAs I understand it, the vref voltage should be something defined as per the IO standard used. It seems like for some IO standard ie SSTL-2, it is half the VCCIO instead of 1.25V. You could refer to the device datasheet for further details on the Vref voltage for different voltage referenced IO standard. Look for "Reference Voltage Specifications" keyword in the datasheet.
Honored ContributorFYI, the VREF is for INPUT only. You can imagine the INPUT buffer is like a comparator. It will need a reference to know what is defined as HIGH or LOW. Normally VREF is set in the middle so that it HIGH/LOW is equally divided across its range of voltage.
