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Altera_Forum
Honored Contributor
9 years agoI have a similar issue.. I am creating a 150MHz clock from the internal PLL using using a 25MHz external clock.
I changed the clock assignment to 100Mhz and the output looks great. I am using 10M02SCE144C8G My 25MHZ clock is applied to pin 27 My 150MHZ clock comes out on pin 141, I have a TP at pin 31, where I send a copy of the signal. On pin 141 I have a series termination resistor. which I have lifted one side... Not understanding why the frequency is ok but voltage levels are off.. my PLL outputs are: C0 100MHZ internal C1 100MHz external C2 150MHz external C3 FPGA_PIN31 Any help would be great..