Forum Discussion
NitzanD
New Contributor
New Contributorvirtual clock - latch and launch clock on same cycle
Hi, I am defining a virtual clock in .fdc file for work with external device as in the link here: https://www.intel.com/content/www/us/en/docs/programmable/683068/18-1/creating-virtual-clocks.html...
Nurina
Regular Contributor
Regular ContributorHello Nitzan,
Usually you don't have to specify that real clock and virtual clock are in different clock groups.
As mentioned in email, I think the problem is that you are using the same virtual clock for both input and output delay.
Have you tried using different virtual clocks for input and output delay?
Regards,
Nurina
NitzanDNew Contributor
New ContributorI haven't. why should they be different ?
BR
Nitzan
