Video buffer/rate matcher

Option 1: a medium/large FPGA will have enough internal RAM to hold a frame.

Option 2: external RAM.

Weather they're asynchronous SRAM, synchronous SRAM or DRAM, eventually you'll end up having a controller interface with abstracts away the RAM type and just lets you read/write into them.

If you're rolling your own logic, internal RAMs may be simpler to use, as they're true dual ported and can have any width you need.

Even after the controller, external RAMs will give you a most strict interface to work with. But as Ted said, if you're using Qsys/SOPC, there are blocks to abstract it all away for you.