VHDL Protected type help

Tricky =>

Well, I'm new to FPGA and VHDL so I don't know much about them, I still learning... :)

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you can use shared variables without the protected typing:

shared variable s : std_logic;

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From what I read from The Designer Guide to VHDL 3rd Edition book, page 589, on the top page, it said that shared variable must be of protected types... how about that?

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then you just write to it like any other variable. At the end of the day though, quartus is still going to give you multiple driver errors.

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But error means can't be synthesize?

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I get the feeling you're trying to write this code as code, and not thinking about the underlying hardware, which is essential for hardware design. Without the understanding of the hardware, the VHDL will be meaningless when it comes to synthesis.

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Well, you got a hit, indeed, I used to play with firmware (C) and computer programming (Java), I need to change my mind set hardware design(FPGA and VHDL)... I found it a bit difficult :D

Thanks for your advise... I appreciate that... :)

Pletz =>

Yes.... It seem you have a good reputation, do you have any idea regarding to my problem?

Thanks...