vhdl problem for iir filter

Hello,

I can't indentify a filter, cause there is no signal input. If you are actually trying to design an oscillator, then you should probably choose a structure less sensitive to rounding errors or use an NCO instead.

But apart from this consideration, the shown IIR structure can surely be synthesized in VHDL. I understand, that cos(w) is a constant that either can be calculated at compile time or loaded as a parameter (which is big difference for FPGA implementation), the same with the said initial values. Next you have to define a numeric format (probably signed) and a resolution. Then the algorithm can be build from a multiplier and a substractor megafunction or infered from HDL. Two registers are needed to store previous y(n).

Basic operation can be evaluated also in a spreadsheet tool, e. g. Excel to study rounding error effects with different numerial resolution.

Regards,

Frank