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Altera_Forum's avatar
Altera_Forum
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16 years ago

VHDL Package

Hi, Pardon me if this is not the right place to post this question. Just a simple one. Im not too sure about this package thingy in vhdl coding. How does it differ from creating a component and...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

say there is one particular part of the circuit require to perform certain arithmetic. it is more beneficial that i create component or package for it?