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Altera_Forum
Honored Contributor
8 years ago[VHDL] 'else generate' is not supported ...
Hi All, I'm receiving the following error during my code compilation: (vcom-1440) Language feature ELSE GENERATE STATEMENT is not supported yet From what Quartus version is this f...
Altera_Forum
Honored Contributor
8 years agoActually I tried this sintax in another Quartus 16 and it passed there...
Any clue? In both the file was defined as VHDL-2008 How could it be?