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Altera_Forum
Honored Contributor
Honored ContributorVHDL DE2 board understanding Processes and Signals
So I wrote a program to turn on LEDS if SW, a switch, is '1' and off if '0'. entity StateLCD is
port(
SW : in std_logic_vector(0 downto 0);
LEDG : out std_logic_vector(7 downto 0);
...
Altera_ForumHonored Contributor
Honored Contributoryour sensitivity list only takes care of "SW", which means your process is only executed when there is any change in SW. signals are updated at the end of process, with your code it means the LEDG is assigned with the existing(previous) value.
anyway, if you want to tie signals to outputs, you don't need to put them inside process
