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Altera_Forum
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15 years ago

VHDL constant type synthesis

The constant type here is two-dimension data array constant which is correct when simulating in Modelsim, but is false when mearsured using oscillograph because I can't reach the inner unit of the co...
Altera_Forum's avatar
Altera_Forum
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15 years ago

The constant syntax doesn't say anything about how the constant is actually implemented in your design. It may either mean a constant value that's used at compile time or involve ROM inference, when all prerequisites are met. The value would be accessible somehow in any case. "can't reach the index I want" sounds rather unclear. You should tell, what you are actually doing.