Forum Discussion
Altera_Forum
Honored Contributor
16 years agoVHDL constant type synthesis
The constant type here is two-dimension data array constant which is correct when simulating in Modelsim, but is false when mearsured using oscillograph because I can't reach the inner unit of the co...
Altera_Forum
Honored Contributor
16 years agoIm guessing that what you have synthesized is a ROM. You need to provide the correct address to the rom to access the internal values.