Forum Discussion
31 Replies
- Altera_Forum
Honored Contributor
here is division in VHDL:
a <= b / c; - Altera_Forum
Honored Contributor
DOes the quartus supply the special circuit for division?
What's the restriction or result fomat for a ,b and c on condition of a<=b/c? - Altera_Forum
Honored Contributor
he only wanted division in VHDL - he never said anything about synthesising it.
- Altera_Forum
Honored Contributor
Aha! But I want to know if both the dividend and divider are integer, if so the result must be integer too?
Many hardware and synthesis tools support the division implementation, and also many have special IP division module where the synthesis should be implemented. So,if use a<=b/c,is the tool to implement in IP ? - Altera_Forum
Honored Contributor
With ieee.numeric_std, Quartus actually infers signed and unsigned dividers from HDL code, so you don't necessarily need to instantiate a divider MegaFunction. If you want multiple pipeline stages or other special features, you still need the Megafunction. With ieee.std_logic_arith, dividers are apparently only infered for the integer data type.
- Altera_Forum
Honored Contributor
but when i use quartus it is not accepting the division(/)
- Altera_Forum
Honored Contributor
--- Quote Start --- quartus it is not accepting the division(/) --- Quote End --- It does, under the conditions I told. (Valid at least for V9.0 and later). - Altera_Forum
Honored Contributor
--- Quote Start --- but when i use quartus it is not accepting the division(/) --- Quote End --- are you trying to divide std_logic_vectors? you cant do that. a std_logic_vector is not a number. - Altera_Forum
Honored Contributor
For division between unsigned, you need "USE ieee.numeric_std.all;" in VHDL (I think)
- Altera_Forum
Honored Contributor
if you want to do division of any significant bitwidth (>3~4 bits num and den), you need to instantiate the divider megafunction and then configure it to have several pipe stages. This will allow it to meet timing when you actually try to compile it.
If you want some fractional bits in your answer, then you need to tack on some zeros in the numerator (similar to left shifting the number in c eg. shifted_num = num << frac_bits).