VGA Controller

This is a VGA Controller peripheral that can be used directly in SOPC Builder with Nios II.

The controller contains its own free-running DMA engine that continually fills a FIFO with video data from the frame buffer. On the read side of the FIFO is a VGA sequencer that controls the timing of the VGA signals as well as pulls video data from the FIFO and converts it to the correct width before sending it to the VGA DAC. To maintain high bandwidth, pipelined Avalon reads are used by the DMA engine.

The controller is implemented in Europa and is configurable through an SOPC Builder GUI. You can configure the FIFO Depth, the screen resolution, the color depth, and whether or not to use double frame buffering.

Supported resolutions are 640x480, 800x600, and 1024x768. Supported color depths are 16 and 24 bits.

In addition, the component includes a nifty software driver that is HAL compatible, and gets included automatically in any Nios II IDE software project created for a system that contains the VGA controller. The driver automatically initializes the controller prior to entering main(), based on the parameters chosen in the SOPC Builder component GUI.

There is also an example design included in the attached .zip file. The example is built for a Nios Stratix II 2s60 board and demonstrates the use of the HAL driver and some of its graphics libraries such as displaying simple shapes and text.