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Altera_Forum's avatar
Altera_Forum
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20 years ago

VGA Controller

This is a VGA Controller peripheral that can be used directly in SOPC Builder with Nios II.

The controller contains its own free-running DMA engine that continually fills a FIFO with video data from the frame buffer. On the read side of the FIFO is a VGA sequencer that controls the timing of the VGA signals as well as pulls video data from the FIFO and converts it to the correct width before sending it to the VGA DAC. To maintain high bandwidth, pipelined Avalon reads are used by the DMA engine.

The controller is implemented in Europa and is configurable through an SOPC Builder GUI. You can configure the FIFO Depth, the screen resolution, the color depth, and whether or not to use double frame buffering.

Supported resolutions are 640x480, 800x600, and 1024x768. Supported color depths are 16 and 24 bits.

In addition, the component includes a nifty software driver that is HAL compatible, and gets included automatically in any Nios II IDE software project created for a system that contains the VGA controller. The driver automatically initializes the controller prior to entering main(), based on the parameters chosen in the SOPC Builder component GUI.

There is also an example design included in the attached .zip file. The example is built for a Nios Stratix II 2s60 board and demonstrates the use of the HAL driver and some of its graphics libraries such as displaying simple shapes and text.

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    17 years ago

    Hello NiosII users!

    Somebody has used the VGA Controller in VHDL language projects?

    I'm having problems in VHDL generation. The first error is XOR declaration, thar is declared in Verilog (~^), into a VHDL (XOR) file.

    Now a have the error in "LPM_MODULUS" .

    Thanks!
  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    --- Quote Start ---

    originally posted by nate_knight@Jan 10 2006, 07:58 AM

    this is a vga controller peripheral that can be used directly in sopc builder with nios ii. ......

    supported resolutions are 640x480, 800x600, and 1024x768. supported color depths are 16 and 24 bits. ....... <div align='right'><{post_snapback}> (index.php?act=findpost&pid=12078)

    --- quote end ---

    --- Quote End ---

    It sounds great, but I found it hard to understand. could it be used with DE2 board?
  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    Hi tomyaoyuan,

    if you look at the altera docs about bit31 workaround and compare your sdram adress location of 0x0100000 with 0x8101a9c8 you will notice that bit 31 is set, meaning direct read without datacache ... you will not be able to have any memory or register beyond 0x7fffffff.

    just think that bit 31 is always 0.

    Regards.

    Michael Schmitt
  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    vga_frame_buffer = vga_init_no_interrupt( vga, HEAP );

    =====================================

    In my niosII system, SDRAM space is 0x0100000~0x01fffffff, but vga_frame_buffer = 0x8101a9c8, vga_frame0 and vga_frame1 are not in SDRAM,

    Why?

    vga_frame0 and vga_frame1 are always 0x00, So VGA Monitor is always Black.

    If I use:

    vga_frame_buffer = vga_init_no_interrupt( vga, 0x01800000 );

    in order to assign vga_frame_buffer in SDRAM, but vga_frame0 and vga_frame1 return 0.
  • Altera_Forum's avatar
    Altera_Forum
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    20 years ago

    <div class='quotetop'>QUOTE </div>

    --- Quote Start ---

    The controller is implemented in Europa ...[/b]

    --- Quote End ---

    I wonder if there is a documentation for Europa somewhere out there ?

    Can someone help me ?

    Thanks