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Dear GPK and Quartus Penguin,
Thanks for your response,
the problem is testcase/design dependence. In some cases, the state machine is stuck in an unknown state, and we were not able to reproduce the problem in simulation.
May i know the "resource differences" is reffering to?
How can I verify (generate report) of all synthesis options?
Is there a way to save warning/error reports in txt file?
We are using Quartus v6.0, v8.1 and v9.0.
Best regards
Jenny
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Hi,
sometimes it looks like that the synthesis tools are the reaason of the problem, but later it turns out that the design description is the root cause e.g. not all states of a state machine are covered, no reset for a statemachine , reset signals are not synchronized to the clock domain. I could imagine that the different versions of Quartus will deliver different results in such cases. Maybe it is a good idea to ahve a look into your design.
Kind regards
GPK
Honored Contributor
