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I am trying to design a twelve hour clock in Verilog to load into a DE2 board.
I have the seconds and minutes working just fine but am lost as to how get the hours to count properly.
The way the logic needs to work is after decimal_counter_hour_0 increments up to 9, decimal_counter_hour_1 will increase its
count by one and decimal_counter_hour_0 will return to a 0 on the positive clock edge showing 10:00. Because this is a 12 hour clock the count needs
to be 10:00, 11:00, 12:00, and then start over at 1:00. I am lost as to how to implament the logic of this requierment.
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Hello.
It is not that simple; while all other digits (minutes and seconds) can be done with the simple "Overflow" logic the hours cannot:
The lower digit of the hour overflows from 9 to 0 if the higher digit is 0 but it overflows from 2 to 1 if the higher digit is 1. This means the counter for the lower digit must know the higher digit.
There are two principial ways to handle this:
1) Use the output of the higher digit counter as input into the lower digit counter
2) Count both digits in the same module. This solution appears easier to me.
Solution 2 may look like this (code shown here is NOT tested):
module decimal_counter_hour(A10,A1,OVERFLOW,CLK,RST);
input CLK, RST;
output OVERFLOW;
output A10;
output A1;
wire A10;
wire OVERFLOW;
wire A1;
reg hour;
initial hour = 1;
always @ (posedge CLK or negedge RST)
if (RST && hour<12) begin
hour = hour + 1;
end
else begin
hour = 1;
end
assign OVERFLOW = (hour < 2);
assign A10 = (hour > 9);
assign A1 = A10 ? (hour - 10) : hour;
endmodule
Martin
Honored Contributor
