Verify failed ---Leaving target processor paused

@mchmitt

actually, i have sram, ethernet, sdram, timer, and some PIOs in my hardware image, along with flash (attached to NIOS). I place that image inside FPGA (sof) before running flash programmer.

I checked for timings, i found them to be correct. (this gives rise to one more doubt of mine, that if timings were wrong, then would memtest fail or pass? )