Forum Discussion

jaykrishna1's avatar
jaykrishna1
Icon for New Contributor rankNew Contributor
4 months ago

Vcm for the clock input pins of agilex5 E-series FPGA A5ED065BB32AE5SR0

Hi,   We are working with the following differential clock input pins:   - CLK_[T,B]_2[A,B]_[0:1] (P/N) - CLK_[T,B]_3[A,B]_[0:1] (P/N)   Could you please confirm the allowed common-mode voltag...
Generic Io
FvM's avatar
FvM
Icon for Super Contributor rankSuper Contributor
4 months ago

Hi Jay,

you can refer to datasheet for suitable Vicm range. Most Devkits are biasing AC coupled TDS input to Vccio/2 with 4 resistors 1k - 10k.

Regards Frank