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Honored Contributor
Honored ContributorVCCIO Voltage Change
Hi, I use EP3C10F256C8 chip , VCCIO set 1.8V , if other IO pin input set Hi(3.3V), result VCCIO change 2.2V? VCCIO set 1.5V , if other IO pin input set Hi(3.3V), result VCCIO change 2.2V?
Altera_ForumHonored Contributor
Honored ContributorI checked the Multi-IO paragraph of C3 and some details drawed my attention:
* VIH,max for all I/O standards (except 1.8V) is VCCIO + 0.3V and VIL,min for most of the I/O standards is -0.3V (table1-13). This could suggest the use of schottky clamping diodes. But that's not the case, as already mentioned. * VI is recommended from -0.5V to 3.6V (table 1-3). No VCCIO mentioned in this table, so I assume for every possible VCCIO. * A VI,overshoot of 3.95V is allowed for 100% of the time (table 1-2). Also here no VCCIO mentioned in this table, so I assume for every possible VCCIO. So in the most worst-case situation at VCCIO of 1.2V, can I set my input to 3.95V for 100% of the time without damaging my component? May I pull-up the opendrain CONF_DONE to 3.95V if VCCIO is 1.2V? Just curious, -- Ton A related thread: http://www.alteraforum.com/forum/showthread.php?p=26563
