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Altera_Forum's avatar
Altera_Forum
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13 years ago

using PFL in MAX II and MAX V

Hi, guys, recently, I am studying to use PFL in max cpld for FPP configuration of FPGA. I found that when I used PFL in max v 5m570zt100c5, the time requirement was not met (Fmax was less than 30mhz)...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Check the speed grade.

Example: MaxII speed grade 4 is not same as MAXV speed grade 4.