Using FTDI FT2232H to load Cyclone 3

Hi Dave

First of all, let me thank you for your reply.

I have been working on this for the last few days making incremental progress. After some head-scratching I think I am 95% done, only one final issue to resolve (I hope).

So far I have been able to:

1. Controlling the nConfig, so it can be asserted (and deasserted) to start the configuration.

2. Load the file.rbf file and send it to the FPGA, (256K in 1-2 seconds), Config_Done goes high.

3. I included logic in the FPGA-Hardware image which drives a pin out at 1 KHz (I can see it on Oscilloscope) so I know the image is loaded.

4. C-code toggles another pin. I do see it working when JTAG is used to load FPGA, however, I do not see it when FT2232H is loading the FPGA (JTAG removed)

5. Being able to observe the Init_done pin would be great. However, it is used for LVDS so I do not think it can be used (not sure).

So I am wondering: Do I need to assert (and deassert) the reset line to the FPGA after it has been loaded?

Or, is there some other setting (Board BSP???)

Thanks

Hans