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Altera_Forum's avatar
Altera_Forum
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15 years ago

using fpga output pin as enable

Hi, I'm trying to use an FPGA output pin (through a pin header) as an enable for a switch. I've noticed that when the enable is "low", it's voltage is actually around 0.13 V with respec...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I possibly didn't understand your intention well, but 0.13 V is a pretty good low level related to any possible I/O standard. The residual voltage is most likely caused by internal voltage drops in the FPGA (assuming the output is actually unloaded). It's not intended as as an analog output voltage, however. If you need exactly zero volt, use an analog switch or a CMOS single gate buffer.