Altera_ForumHonored Contributor17 years agoUsing CRC detection with standalone FPGA Hello, I'm planning a board with a standalone Stratis II FPGA. Since I have no external CPU on the board, I plan to use a EPCS device to configure the FPGA in AS mode. I want to employ the r...Show More
Recent DiscussionsCyclone-V SCFIFO - adding ECC to M10K/MLAB/Auto memoryWill serialization factor of 6 in LVDS serdes IP be supported in the future on Agilex5?System PLL of Agliex5 PCIE example design cannot be locked after configurationJTAG Chain Broken on Agilex 7-I Dev KitRequest for Cyclone V Pinout File Information