Forum Discussion
Altera_Forum
Honored Contributor
14 years agoUsing ALTPLL and ALTCLKCTRL (Clock Muxing)
I have 3 clocks that I want to select which clock to use for a certain part of my subsystem. 2 clocks are generated from the internal PLL and one is a external clock source. Although the conce...
Altera_Forum
Honored Contributor
14 years agoYes, it appears that for Cyclone III (and maybe all Cyclone families?), that this does produce the error unless you create the MegaWizard for 4 inputs of the ALTCLKCTRL. This sounds like a bug to me as I see no reason why the fitter couldn't do the same thing it does for Stratix IV and just rearrange the inputs. If you create all 4 inputs on the ALTCLKCTRL and leave input[0] unconnected, you won't get the error. You end up with the exact same implementation as with Stratix IV. You can still bring the input clock to the PLL into the ALTCLKCTRL. I'll file an SPR for this.