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Altera_Forum
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11 years ago

Using Altera GPIO Lite Ip core as bidirectional DDR

Hi, I have a signal whose data rate is 480Mbps. it is a DDR signal. I would like to know whether by using GPIO Ip i can acheive this ?. What would be the IO standard for the ddr output of GPIO...
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Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Thanks Alex,

I am new to FPGA design and i dont have Altera in my PC: I am in a project design phase(so i came across a situation where i need an IO with 480Mbps LVCMOS 1.2V). Sorry for the inconvenience, I hope i can have a Altera Licence soon.

Your reply is very useful for me.

Regards

Sujesh